• List of Selected Candidates for MSME’s Entrepreneurship and Skill Development Programme on Advanced VLSI Design

This is a hands-on laboratory-oriented programme, delivered by leading experts from academia, researchers, and industry in field of VLSI Design. The training will be delivered using industry standard EDA tools integrated with standard process design kit (PDK). The programme strive to provide students with a comprehensive understanding of the design and implementation of integrated electronic circuits for successful career in IC Design and associated industries.

• Students of Pre-final or Final year in B.Tech./MTech./M.Sc./ECE/Electronics/VLSI/Physics) or equivalent
• Researchers and academicians in the field of VLSI

• Academic degree and performance
• Reservation as per GoI rules
• Industrial exposure
• Interview

• Students of Pre-final/Final year in B.Tech./MTech./M.Sc. (ECE/Electronics/VLSI/Physics) or equivalent.
• Researchers and academicians in the field of VLSI design.
• Entrepreneurs working in the similar areas.
• Industry/MSME/GoI/Private persons.

• Selected candidates shall attend the programme physically.
• Attendance (100%) is mandatory.
• The course content related, materials such as hand-outs, photos, videos, and similar other stuffs must not be shared outside.

scan QR code to register

or apply via the link

https://docs.google.com/forms/d/e/1FAIpQLSfd9gdU3V7K20j_3DA5J56k4tetX07HXa1ZfnhKlw1RqU_2Ww/viewform?usp=dialog

Programme Dates: 03-07 March 2025

Last Date to Apply: 25 Feb. 2025, 6:00 PM

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Central Electronics Engineering Research Institute (CEERI), Pilani, a constituent laboratory of CSIR. The foundation stone for the establishment of CSIR-CEERI National Laboratory of CSIR was laid on 21st September 1953 by Pt. Jawaharlal Nehru at Pilani. This National Research Laboratory was established to give impetus to research and development of electronics in the country and to make the country self-reliant.