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X-WR-CALNAME:CSIR-CEERI, Pilani - EN
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X-WR-CALDESC:Events for CSIR-CEERI, Pilani - EN
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TZOFFSETFROM:+0530
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DTSTART:20190101T000000
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DTSTART;TZID=Asia/Kolkata:20190226T090000
DTEND;TZID=Asia/Kolkata:20190226T180000
DTSTAMP:20260609T034623
CREATED:20190225T063210Z
LAST-MODIFIED:20190225T105527Z
UID:8623-1551171600-1551204000@www.ceeri.res.in
SUMMARY:One Day Workshop on VLSI & Integrated Electronic System Design (VIESD 2019)
DESCRIPTION:Organizing Committee\n\n\n\n\nPatrons\nProf. Raj Singh\, Director\, CSIR-CEERI\, Pilani (Rajasthan)\nDr. S. C. Bose\, Chief Scientist\n\n\nChairman\nDr. A. S. Mandal\, Chief Scientist\n\n\nMember\nDr. Abhijit Karmakar\, Senior Principal Scientist\n\n\nMember\nDr. P. C. Panchariya\, Senior Principal Scientist\n\n\nMember\nDr. J. L. Raheja\, Chief Scientist\n\n\nMember\nDr. S. A. Akbar\, Chief Scientist\n\n\nMember\nDr. K. S. Raju\, Senior Principal Scientist\n\n\nMember\nSh. Ajeet Dhakar\, Senior Scientist\n\n\nMember\nDr. Ravi Saini\, Senior Scientist\n\n\nMember\nMr. Anil Kumar Saini\, Senior Scientist\n\n\nMember\nDr. Jai Gopal Pandey\, Senior Scientist\n\n\nMember\nDr. Dhiraj\, Scientist\n\n\nMember\nDr. Anil Saini\, Scientist\n\n\nMember\nSh. Brijendra Verma\, Scientist\n\n\nMember\nSh. Sumeet Saurav\, Scientist\n\n\nMember\nMr. Sanjeev Kumar\, Technical Officer\n\n\nConvener\nDr. Sanjay Singh\, Scientist\n\n\n\n\nInvited SpeakersProf. Dinesh K. SharmaIIT\, BombayDr. Arti NoorC-DAC\, NoidaSmt. Sunita VermaMeitY\, New DelhiProf. Chandra ShekharBITS\, PilaniContactDr. Sanjay Singh\, Scientist \, CSIR-CEERI\nEmail: sanjay@ceeri.res.in\nTel: +91 1596 252214 \n\nAttachmentsleafletWorkshop Schedule
URL:https://www.ceeri.res.in/event/one-day-workshop-on-vlsi-integrated-electronic-system-design-viesd-2019/
LOCATION:CSIR-CEERI\, Pilani\, Central Electronics Engineering Research Institute\, Pilani\, 333031\, India
ATTACH;FMTTYPE=image/jpeg:https://www.ceeri.res.in/wp-content/uploads/2019/02/workshop_VIESD_2019.jpg
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