RF MEMS Switches for C, X and Ku band applications
For an externally (ISRO) funded project CEERI has recently concluded the design and fabrication of novel RF MEMS switches including SPST, SPDT, high Q metallic inductors and MEMS process and materials characterization test structures. Detailed characterization and second fabrication run are underway. About 30 types of electrostatic low pull-in voltage (5 -20 V) capacitive shunt switches based on symmetric toggle and flexible serpentine configurations, demonstrating high (simulated) isolation (35 - 40dB) and insertion loss (-0.15 dB) over C, X and Ku bands have been fabricated. Similar structural design approach has been adopted to fabricate ohmic contact switches, which can handle DC to 6 GHz signals. As a part of the comprehensive MEMS design and characterization approach test structures e.g. micro-cantilever and bridge arrays, Guckul rings and pointers have also been fabricated for extracting structural, dynamic and material properties. Some of the structures are described below.
(a) SEM micrograph of a capacitive symmetric toggle switch (CSS-STS) fabricated at CEERI.
(b) Micro-torsion actuator based SPDT.
A novel switch topology implemented in standard 50Ω CPW, Symmetric toggle switch (STS) can be configured as a varactor, capacitive shunt or ohmic contact switch. The capacitive shunt (CS) variant as shown in Figure 1.(a) consists of two micro-torsion actuators placed symmetrically and transverse to the transmission line and are connected to central overlap area through flexible levers. The torsion actuators anchored by Euler beams have two actuation pads beneath (at 3 µm) and can be used to pull-in or pull out, the surface micro-machined gold electroplated metallic bridge structure. The combination of additional pull-out electrodes, flexible lever and torsional actuation obviates the stiction and self actuation, make the structures impervious to external shocks and improves the electrical performance. Figure 1(b) shows the SEM micrograph of a fabricated micro-torsion actuator based SPDT. The measured CV plots for representative CS-STS devices are shown in Figure 2, indicating off/on capacitance ratio of 77 and 48 respectively. Low actuation voltage single and double spring series ohmic contact switches (as shown in figure 4(a)) and capacitive shunt switches (CSS) have also been fabricated.
Figure 2. Measured CV response of capacitive symmetric toggle switch - actuating at (a) 9.75 volts, Coff/Con ratio 77 (b) actuating at 15 volts with Coff/Con ratio of 48.
Figure 3. Optical (laser) profile of CS- STS (a) 2D profile (b) 3-D surface profile (c) line scan along the bridge indicating a gap height of approximately 3.4 µm.
Serpentine spring based electrostatic low actuation voltage series ohmic contact switch (SOCS) and test structure.(a) Single spring SOCS (b)Symmetric lancet with scale.
RF MEMS Switch video
The measured average gap between the bridge and transmission line is approximately 3.4 µm; about a half micron more than the indented design as shown in figure 3(c). The inbuilt stress in electroplated Au bridge is indicated by the higher deflection of anchor springs in figure 3(b). Figure 4(b) shows a test structure fabricated in electroplated gold. The test structures can be used to extract geometric and material properties including, layout errors, Young´s modulus, residual stress and Poisson´s ratio etc.
In the eight-mask level fabrication process, the movable Au structures are micro-machined in two electroplating steps by using standard electrolyte solutions, on 5 kΩ p-type Si wafers. The process uses three types of photoresists to define actuation pads, transmission lines and three-dimensional metallic structures. In total there are approximately 140 steps involving oxidation, metallization, lithography, CVD, RIE, plasma ashing, and electroplating.
Study of High-k Dielectric Gate Material for Scaled MOS Devices
• Deposition of thin films of HfO2 by sputtering employing substrate bias improves film microstructure and electrical properties compared to the conventional sputtering.
• Optimum thermal annealing in oxygen ambient reduces both the oxide leakage current and oxide charges.
• Wet chemical etching using improved composite solution enhances etching rates and protects underlying SiO2 dielectric.
• MOSCAP capacitors fabricated with HfO2 show reduced leakage current compared with EOT of SiO2 dielectric.
• MOSFET transistor fabricated with HfO2 gate dielectric shows improved drive
current compared to the MOSFET fabricated with conventional SiO2 dielectric.
AFM pictures of micro structure of sputtered HfO2 thin films
Development of micro heaters for Gas Sensing Applications
Micro Heaters Developed at CEERI
Characteristics of Micro Heater Current Vs PRT Resistance
Technology development for Silicon Nitride based Cantilevers
Test structures of a silicon nitride based cantilevers typically 200 mm length, 50 mm width and 1000 A° thickness released by Wet Chemical Etching.
MOSCAP Electrical Properties
The current-voltage characteristics of HfO2 MOS capacitors were measured for the film deposited at different sputtering voltages and annealed in oxygen ambient. It is found that leakage current is optimum for film deposited at 0.8 kV. Moreover the current further reduces by almost an order of magnitude for the film deposited at 0.8 kV with 80 V substrate bias.
I-V Characteristics
C-V Characteristics
The C-V characteristics of the MOS capacitors for film deposited with and without substrate bias are shown in figure(above). The lowest oxide charges 6 x 1011 /cm2 were obtained for film deposited at 0.8 kV. The flat band voltage marginally reduces for film with bias voltage. For comparison Al-SiO2-Si capacitors with about 10 nm SiO2 thermally grown by dry oxidation were fabricated and C-V characteristics were measured. The C-V curve as expected is much steeper and the flat band shift was about 1.1 V corresponding to 1.2x1011 /cm2 interface state charges.
Development of Humidity Sensor Employing Solid State Technology
The micro humidity sensor designed and developed at CEERI consists of Au-Porous Al2O3-Al capacitor structure. The sensor is fabricated from a high purity aluminum substrate. The porous humidity sensitive oxide layer is grown by electrochemical anodisation and a thin water permeable gold film is deposited on the oxide surface. The size of the sensor chip is 3 mm in diameter. The sensor is bonded and packaged on transistor header.
Picture of the Micro Humidity Sensor developed at CEERI
Main Features
• Wide range of operation.
• Fast response.
• Simple technology.
• Low cost.
• Compatible with microprocessor controlled instrumentation.
Typical Specification
• Measurement environment
:Air
• Measurement range
:10 - 95% RH
• Temperature range
:20 - 50°C
• Response time
:40 Sec
• Accuracy
:± 1 % RH from 55 - 95 % RH
:± 3 % RH from 10 - 55 % RH
Design and Fabrication of Polysilicon Piezoresistive Pressure Sensors using MEMS Technology
Pressure sensor chip bonded on TO-8
A packaged pressure sensor
Measured electrical response of pressure sensor at operating voltage of 2.0 Volts and 5.0 Volts
Typical process parameters
• Front to back alignment using holes of proper dimensions
• Polysilicon Thickness
:5000 A°
• Polysilicon Deposition
:LPCVD
• Polysilicon Doping
:Thermal Diffusion of Boron
• KOH etching Mask
:LPCVD Silicon Nitride
MeV ion Induced Re-ordering in Crystalline Silicon; Viability for Device Applications
STM scan of silicon below a 10 mm deep from the surface achieved by chemical etching. Reordering in crystalline silicon can be seen in a confined region around the masked edge.
STM scan
I-V characteristics of virgin and irradiated planar p-n junction
Absolute pressure sensor using front-side etching technology
A processed 2" diameter silicon wafer carrying array of absolute pressure sensors
Enlarged view of the sensor chip
Piezoresistors of boron doped LPCVD polysilicon; two on the membrane and two outside the membrane
Fabricated absolute pressure sensor chip
Anisotropic etching of (100) silicon in aqueous KOH for MEMS technology
Measured boiling temperature of KOH solution with varying concentration
Measured etching rate of silicon(100) at varying temperature and KOH concentration
Etching of polished and lapped silicon(100) at varying temperature
Si(100) etched cavity at 800C in 35% KOH
AFM scan of the etched (100) silicon surface at 800C in 10% wt KOH
AFM scan of the etched (100) silicon surface at 800C in 20% wt KOH
Past Projects
• Silicon Carbide Schottky Diode Detectors.
• High k Dielectrics.
• Polysilicon Piezoresistive Pressure Sensor.
• Vacuum Sealed Absolute Pressure Sensor.
• MeV ion Induced Reordering in Crysatlline Silicon;Vviability for Device Applications.
